sdp(wr_addr_data: Tuple[{'addr': Uint, 'data': Any}], rd_addr: Uint, *, depth) → wr_addr_data['data']

Simple dual-port RAM (SDP). It has one port for writing the data to the RAM, and one port for reading the data from the RAM. The data is written via wr_addr_data input interface which expects a Tuple consisting of the data to be written and the address to which the data should be written to. The read addresses are expected on the rd_addr input interface, for which the sdp() gear outputs the data on that address from the RAM. The depth parameter controlls the depth of the RAM.

wr_addr_data = drv(t=Tuple[Uint[2], Uint[3]],
                   seq=[(0, 0), (1, 2), (2, 4), (3, 6)])
rd_addr = drv(t=Uint[2], seq=[0, 1, 2, 3]) | delay(1)

rd_addr \
    | sdp(wr_addr_data) \
    | check(ref=[0, 2, 4, 6])